File:NE555 Bloc Diagram.svg

From Wikiversity

Original file ‎(SVG file, nominally 723 × 524 pixels, file size: 32 KB)

This file is from Wikimedia Commons and may be used by other projects. The description on its file description page there is shown below.

Summary

Description
English: The NE555 contains 24 bipolar transistors, two diodes and 15 resistors that form six functional blocks:

Between the supply voltage VCC (+) and the ground GND (-) is a voltage divider consisting of three identical resistors which, when connected not from the outside, the two reference voltages ¹ / 3 VCC and ² / 3 VCC supplies. The latter is at the terminal pin Control Voltage available. The block diagram and schematic that area is highlighted in green. Two comparators are each connected to one of the reference voltages, while the other two inputs of which are fed directly to the terminals of trigger or threshold. The block diagram in yellow and orange. A flip-flop, deposited in the color purple, stores the state of the timer and is controlled by the two comparators. Via the reset terminal overrides the other two inputs, the flip-flop (and therefore the entire timer device) be reset at any time. At the output of flip-flop followed by an output stage with totem-pole output that can be loaded at the port output with up to 200 mA. Shown in the color pink.

Parallel to the output stage of a transistor is connected, the collector is located on the discharge port. The transistor in the circuit diagram is a light blue background, always energized when the output is low level.
Deutsch: Der NE555 enthält 24 Bipolartransistoren, zwei Dioden und 15 Widerstände, die zusammen sechs Funktionsblöcke bilden:
  • Zwischen der Versorgungsspannung VCC(+) und der Masse GND(−) befindet sich ein Spannungsteiler aus drei identischen Widerständen, der, wenn nicht von außen beschaltet, die beiden Referenzspannungen ¹/3 VCC und ²/3 VCC liefert. Letztere ist am Anschluss-Pin Control Voltage verfügbar. Im Blockdiagramm und Schaltplan ist jener Bereich grün hinterlegt.
  • Zwei Komparatoren sind jeweils mit einer der Referenzspannungen verbunden, während die beiden anderen Eingänge direkt auf die Anschlüsse Trigger bzw. Threshold geführt sind. Im Blockdiagramm gelb und orange hinterlegt.
  • Ein Flipflop, in der Farbe lila hinterlegt, speichert den Zustand des Timers und wird über die beiden Komparatoren angesteuert. Über den Reset-Anschluss, der die beiden anderen Eingänge übersteuert, kann das Flipflop (und damit der gesamte Timer-Baustein) jederzeit zurückgesetzt werden.
  • Am Ausgang des Flipflops folgt eine Ausgangsstufe mit Totem-Pole-Ausgang, die am Anschluss Output mit bis zu 200 mA belastet werden kann. In der Farbe Rosa dargestellt.
  • Parallel zur Ausgangsstufe ist ein Transistor angeschlossen, dessen Kollektor am Anschluss Discharge liegt. Dieser Transistor, im Schaltplan hellblau hinterlegt, ist immer dann durchgeschaltet, wenn der Ausgang Low-Pegel hat.
Date
Source Own work
Author BlanchardJ
Other versions
Bipolar circuit diagram
CMOS circuit diagram


 
This W3C-unspecified vector image was created with Inkscape .
 
This W3C-unspecified circuit diagram was created with the Electrical Symbols Library.

Licensing

Public domain I, the copyright holder of this work, release this work into the public domain. This applies worldwide.
In some countries this may not be legally possible; if so:
I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law.

Captions

Add a one-line explanation of what this file represents

Items portrayed in this file

depicts

inception

23 September 2007

File history

Click on a date/time to view the file as it appeared at that time.

Date/TimeThumbnailDimensionsUserComment
current19:54, 16 January 2012Thumbnail for version as of 19:54, 16 January 2012723 × 524 (32 KB)WdwdColored function blocks (for circiut diagram) correct transistor symbol (without a circle, because it's inside the chip)
23:27, 7 June 2009Thumbnail for version as of 23:27, 7 June 2009723 × 524 (40 KB)Brighterorangeremove spurious red dot
20:22, 23 September 2007Thumbnail for version as of 20:22, 23 September 2007723 × 524 (40 KB)BlanchardJ{{Information |Description=Bloc diagram of a 555 timer IC |Source=self-made |Date=September 23 2007 |Author=BlanchardJ |Permission= |other_versions= }} {{Created with Inkscape}} {{ElCompLib}} Category:555 timer IC

The following page uses this file:

Global file usage

The following other wikis use this file:

Metadata

This file contains additional information, probably added from the digital camera or scanner used to create or digitize it.

If the file has been modified from its original state, some details may not fully reflect the modified file.

Retrieved from "https://beta.wikiversity.org/wiki/File:NE555_Bloc_Diagram.svg"